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Fabrication of silicon quantum dot single-electron transistors by a combination of self-assembly and self-alignment techniques
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<p> </p><p> We present a technique to fabricate single-electron transistors (SETs) with silicon quantum dots (QDs) as conducting islands making use of a combination of self-assembly and self-alignment effects. Starting from an ultra-thin silicon-on-insulator (SOI) substrate we employ aminosilane as an adhesion agent to self-assemble gold colloidal particles in a sub-monolayer. These particles are then used as an etch mask for a CF<sub>4</sub> reactive ion etch (RIE) process in which the silicon is removed everywhere except below the gold colloids, yielding silicon QDs on a SiO<sub>2</sub> layer. A metal wire together with side gate electrodes is patterned by electron beam lithography (EBL) onto the QD-covered sample, and a nanometer-sized gap is created in these wires by a controlled electromigration process. Self-alignment of the evolving nano-electrodes with respect to the QDs is achieved, because the metal layer is locally dilated by the QDs resulting in a locally higher current density. Therefore the metal wires will preferentially break at the positions of the QDs. To obtain tunneling contacts the native oxide layer covering the silicon QDs is used as a tunneling barrier. Its thickness can be adjusted in a controlled manner by self-limiting thermal oxidation to obtain an accurate tunneling resistance. The devices are electrically characterized at liquid helium temperature and show clear Coulomb blockade behavior, Coulomb staircase features and the so-called Coulomb diamonds which are typical for SETs.</p>
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Wolf, Conrad R. (2007): Fabrication of silicon quantum dot single-electron transistors by a combination of self-assembly and self-alignment techniques. E-MRS Spring Meeting 2007 (Strasbourg, France).
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https://www.hs-coburg.de/publikation/3615-fabrication-of-silicon-quantum-dot-single-electron-transistors-by-a-combination-of-self-assembly-and-self-alignment-techniques/
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Fabrication of silicon quantum dot single-electron transistors by a combination of self-assembly and self-alignment techniques
We present a technique to fabricate single-electron transistors (SETs) with silicon quantum dots (QDs) as conducting islands making use of a combination of self-assembly and self-alignment effects. Starting from an ultra-thin silicon-on-insulator (SOI) substrate we employ aminosilane as an adhesion agent to self-assemble gold colloidal particles in a sub-monolayer. These particles are then used as an etch mask for a CF4 reactive ion etch (RIE) process in which the silicon is removed everywhere except below the gold colloids, yielding silicon QDs on a SiO2 layer. A metal wire together with side gate electrodes is patterned by electron beam lithography (EBL) onto the QD-covered sample, and a nanometer-sized gap is created in these wires by a controlled electromigration process. Self-alignment of the evolving nano-electrodes with respect to the QDs is achieved, because the metal layer is locally dilated by the QDs resulting in a locally higher current density. Therefore the metal wires will preferentially break at the positions of the QDs. To obtain tunneling contacts the native oxide layer covering the silicon QDs is used as a tunneling barrier. Its thickness can be adjusted in a controlled manner by self-limiting thermal oxidation to obtain an accurate tunneling resistance. The devices are electrically characterized at liquid helium temperature and show clear Coulomb blockade behavior, Coulomb staircase features and the so-called Coulomb diamonds which are typical for SETs.
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